Integrated circuits ("lCs") as well known in the art employ regions of silicon which are doped to form material of different conductivity type polarity such as P type and N type material. Additionally, the P and N type material may be doped to different concentration levels to control conductivity, as known to those skilled in the art.
P or N material isolation layers, isolate the electrical circuit formed on P or N substrate material, from the other separate semiconductor materials forming the electrical components. As is well known, the various combinations of P and N material forming the electric circuits and the substrate also form parasitic circuits such as parasitic transistors. Further, the IC may be required to be connected to a voltage source in a defined polarity. In this case, reversal of the polarity may cause damage to the IC such as by high reverse bias current.
It is desirable to find a way to construct an IC so that reversal of the power source polarity to the IC would not cause damage by producing a high reverse bias current. It is desirable to construct the IC so reverse bias current is prevented at all times in the event of polarity reversal and where this safeguard is part of, and cannot be removed, from the IC.
A material such as a P type material serving as a diffused resistor for example, in an integrated circuit may be mounted in a material of opposite polarity such as an N epi material. The opposite polarity material serves as an isolating material, isolating the P type material from other P type materials and from a P type substrate within an integrated circuit. Where that structure, including the materials at two different polarities are mounted in a substrate, for example having the same polarity as the first material, such as the P material forming a diffused resistor, a parasitic transistor is produced. To avoid parasitic currents through that parasitic transistor a direct connection is made from the first polarity material such as the P material, to the second polarity material such as the N epi material serving as an isolation layer. In this way, bias to the parasitic resistor was prevented and parasitic currents were avoided.
In the prior art example shown, the first material is P+ material serving as a diffused resistor within an integrated circuit. It is mounted in N epi material serving as an isolation layer. The substrate for the integrated circuit is formed of P material. The parasitic transistor formed of the P+ diffused resistor material, the N epi material, and the P substrate is prevented from conducting a leakage current by a direct short connection from the P+ diffused resistor material to the N epi material serving as the base and preventing bias from forming in the parasitic transistor.
It is this short connection that creates a possibility of reverse bias current when the polarity is reversed to the diffused resistor, for example applying negative polarity to the diffused resistor and positive polarity to the substrate. As would be understood by those skilled in the art, the P substrate and the N epi material form a PN junction. This PN junction would then be shorted by a direct connection to the negative terminal of the battery under such a reverse polarity connection by the direct connection described above from the N epi material to the P+ diffused resistor material which is made to prevent leakage current through the parasitic transistor described above.